Digital Interview Questions - Part 1

Q : If inverted op of D ff is connected to input of ff how the flop behave ??
A : It behave as T flipflop

Q : Design a circuit for dividing input frequency by 2 ?
A : please give input frequency as the clock of T flip flop & input of flop is 1. Output will be input
clock divide by 2 .

Q : What are the different type of adder implementation ?
A : Carry Ahead,And & Xor combinational circuit , Ripple carry .

Q: Give the Truth Table for a Half Adder ?? Give gate level Implementaion of it ??
A:
A B Y Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

Y = A xor B , Carry = A and B

Q : Design OR gate from 2:1 mux
A : assume that A & B are the input of OR gate . Then
Give A as sel pin of 2:1 mux , B to the 0th pin Mux & 1 to 1th pin of Mux

Q : Design a D FF from two latches ?
A : Connect two latches serialy , First latch enable pin positive level & second latch enable pin
as negative level or vice versa . Connect clock to enable pin it will work as FF .